12-23-2024, 07:41 PM
![[Image: f44df755119b049215a7ff1f4a1b14b4.jpg]](https://i124.fastpic.org/big/2024/1223/b4/f44df755119b049215a7ff1f4a1b14b4.jpg)
pdf | 56.43 MB | English| Isbn:9789811010736 | Author: Zheng Wang, Anupam Chattopadhyay | Year: 2017
Description:
Quote:This book introduces a novel framework for accurately modeling the errors in nanoscale CMOS technology and developing a smooth tool flow at high-level design abstractions to estimate and mitigate the effects of errors. The book presents novel techniques for high-level fault simulation and reliability estimation as well as architecture-level and system-level fault tolerant designs. It also presents a survey of state-of-the-art problems and solutions, offering insights into reliability issues in digital design and their cross-layer countermeasures.Category:Computers, Computer Hardware, Computer Hardware - General
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