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Fundamentals Of Arm Architecture(Armv7A, Armv8A) Part 1 - AD-TEAM - 01-05-2025
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Fundamentals Of Arm Architecture(Armv7-A, Armv8-A) - Part.1
Published 9/2024
MP4 | Video: h264, 1920x1080 | Audio: AAC, 44.1 KHz
Language: English | Size: 2.63 GB | Duration: 8h 41m
Practical course to teach Assembly instruction, Register and Exception level in Armv7-A and Armv8-A
What you'll learn
Understand the basic working principles of Arm architecture (Armv8-A, Armv7-A)
Understand the registers in Arm architecture (Armv8-A, Armv7-A)
Learn the processor modes defined in Armv7-A
Understand the exception levels defined in Armv8-A
Use the hardware debugger program, TRACE32, effectively
Requirements
Computer Architecture
Microprocessor
Description
Gaining a solid understanding of Assembly instructions, registers, processor modes, and exception levels in Arm(Armv7-A and Armv8-A) architecture. Effectively learn Arm architecture using TRACE32 and gain sufficient insight into the inner workings of Armv7-A, Armv8-A, and Linux kernel internalsWhy should we learn the Arm architecture?Arm processors are used in smartphones, AI-based SoCs (System on Chips), electric vehicles (for autonomous driving and infotainment), as well as in cloud servers and MacBooks. These processors are all based on Armv8-A 64-bit Cortex-A processors (like Cortex-A53, Cortex-A57, Cortex-A72, etc.). In the system software industry today, understanding the Armv8-A architecture is one of the most important and required skills. But do you find Armv8-A and Armv7-A architectures difficult to understand?The challenges of learning the Arm architectureMany people who want to be Linux embedded developers learn computer architecture and operating systems. They also study CS (computer science) theory to some extent. Nowadays, BSP engineers in chipset company and system software engineer in Automotive sector analyze Linux device drivers, RTOS, or bootloaders. But still, something seems to be missing. They know that to become a professional system software developer, they must understand the Arm architecture. Yet, when they open the Arm spec documents, they realize that learning it alone can be very hard.By the end of this course:You will learn the basics of Arm architecture, including registers, assembly instructions, operation modes, and exception levels.You will understand key parts of Arm architecture by analyzing code examples.You will become familiar with practical features of Arm architecture that help you develop stable and high-performance system software, like drivers and bootloaders.You will be able to use TRACE32 to work directly with assembly instructions, applying key concepts to real-world examples.Final message for system software developers!To become a competitive system software engineer, understanding ARM architecture is essential. This course breaks down the difficult and complex features of modern ARM architectures (Armv8-A, Armv7-A) into easy-to-understand content. It explains how the architecture is actually used with real project examples and sample code analysis. This course will be a key step in helping you become a highly skilled system software developer.
Overview
Section 1: Introduction
Lecture 1 Why we need to learn Arm architecture - Part.1
Lecture 2 Why we need to learn Arm architecture - Part.2
Section 2: Introducing Registers
Lecture 3 What is the register?
Lecture 4 How to learn about register?
Section 3: Armv7-A: Part1. General-purpose register
Lecture 5 Armv7-A: Register Overview
Lecture 6 Armv7-A: banked register: R13_ (Part.1)
Lecture 7 Armv7-A: banked register: R13_ (Part.2)
Lecture 8 Armv7-A: banked register: R14_
Section 4: Armv7-A: Part2. CPSR and SPSRs
Lecture 9 CPSR (The Current Program Status Register)
Lecture 10 SPSRs (The Special Program Status Register)
Lecture 11 How SPSRs are updated (Interrupt)
Section 5: Armv8-A - Register
Lecture 12 Introducing register in Armv8-A
Lecture 13 General-purpose registers
Lecture 14 Special Registers
Lecture 15 ELR_ELx - Exception link register
Lecture 16 Introducing SPSR_ELx register
Lecture 17 How is SPSR_ELx register updated during generation of exception
Section 6: Mastering Register with TRACE32 debugging
Lecture 18 Armv7-A: Identify the general-purpose register
Lecture 19 Armv7-A: Debugging banked register (Part.1)
Lecture 20 Armv7-A: Debugging banked register (Part.2)
Section 7: Armv8-A: System registers
Lecture 21 Introducing System registers in Armv8-A
Lecture 22 Example of system register - HCR_EL2
Lecture 23 The lowest exception level for system registers
Lecture 24 Write or Read the system registers: MSR and MRS
Section 8: Introducing Assembly instruction
Lecture 25 What is it challenging to learn about assembly instruction?
Lecture 26 What can we do using assembly instruction: 1. Bringup
Lecture 27 What can we do using assembly instruction: 2. Develop device driver
Lecture 28 What can we do using assembly instruction: 3. Improve debugging ability
Lecture 29 Basic form of assembly instruction
Lecture 30 MOVE instruction
Section 9: Arithmetic instruction
Lecture 31 ADD instruction
Lecture 32 ADD instruction (TRACE32 practice)
Lecture 33 SUB instruction
Lecture 34 SUB instruction (TRACE32 practice)
Section 10: Logical operation
Lecture 35 AND instruction
Lecture 36 AND instruction (TRACE32 debugging)
Lecture 37 ORR instruction
Lecture 38 ORR instruction (TRACE32 debugging)
Lecture 39 ORN instruction
Lecture 40 BIC instruction
Lecture 41 EOR instruction
Section 11: Bit shift operation
Lecture 42 Introducing Bit Shift operation
Lecture 43 LSL instruction
Lecture 44 LSR instruction
Section 12: Branch operation
Lecture 45 B instruction
Lecture 46 BL instruction
Lecture 47 BX instruction - Armv7
Lecture 48 BLX instruction - Armv7
Lecture 49 BX, BLX instruction (TRACE32 Debugging Practice)
Lecture 50 BR instruction - Armv8
Lecture 51 BLR instruction - Armv8
Lecture 52 BR, BLR instruction (TRACE32 Debugging Practice) - Part.1
Lecture 53 BR, BLR instruction (TRACE32 Debugging Practice) - Part.2
Section 13: Conditional branch operation
Lecture 54 Introduction to conditional operation
Lecture 55 CBZ instruction
Lecture 56 CBNZ instruction
Lecture 57 TBZ instruction
Lecture 58 TBZ instruction (TRACE32 debugging)
Lecture 59 TBNZ instruction
Lecture 60 TBNZ instruction (TRACE32 debugging)
Section 14: Exception-generating instruction
Lecture 61 SVC instruction
Lecture 62 HVC instruction
Lecture 63 SMC instruction
Section 15: Memory Access operation
Lecture 64 LDR instruction - Part.1
Lecture 65 LDR instruction - Part.2
Lecture 66 STR instruction - part.1
Lecture 67 STR instruction - part.2
Section 16: Processor mode(Armv7-A)
Lecture 68 User mode
Lecture 69 Supervisor mode
Lecture 70 IRQ mode and FIQ mode
Lecture 71 Abort mode
Lecture 72 Undefined mode
Section 17: Exception Level in Armv8-A(Part.1)-Introducing Exception level (Armv8-A)
Lecture 73 Introduction to Exception level in Armv8 architecture
Lecture 74 Exception level-Arm specification review
Lecture 75 Why BSP software engineer should learn Exception Levels?
Section 18: Exception Level in Armv8-A(Part.2)-Exception Level 0 with user application
Lecture 76 Details of EL0(User application) in Linux system
Lecture 77 Example code at EL0 in Linux system
Lecture 78 EL0 in Virtualization and TrustZone feature
Lecture 79 Exception level change at EL0 in virtualization (Big picture)
Section 19: Exception Level in Armv8-A(Part.3)-Exception Level 1 with Linux kernel
Lecture 80 Details of EL1(Linux kernel) in Linux system
Lecture 81 Highlight: Exception handling at EL1
Lecture 82 Memory abort Exception handling at EL1
Lecture 83 Memory system in case of Memory abort
Lecture 84 IRQ(Interrupt) Exception handling at EL1
Lecture 85 IRQ(Interrupt) handling - Software point of view
Section 20: Exception Level in Armv8-A(Part.4)-Mastering Exception level with TRACE32
Lecture 86 Read CurrentEL system register to identify exception level
Lecture 87 Enter EL1 from EL0 via SVC instruction
Lecture 88 Enter EL2 from EL1 via HVC instruction
System software engineer (Linux BSP engineer),Chipset BSP and firmware software engineer,Automotive system software engineer,System software engineers who are eager to level up debugging skills,Professionals interested in exploring Armv8 and Armv7 architecture
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